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Inhibit Circuit

IP.com Disclosure Number: IPCOM000093730D
Original Publication Date: 1966-Jan-01
Included in the Prior Art Database: 2005-Mar-06
Document File: 2 page(s) / 31K

Publishing Venue

IBM

Related People

Weiss, L: AUTHOR

Abstract

This is a logical inhibit circuit. It makes use of current switching techniques to provide extremely fast signal propagation times. Transistor pairs T1 and T2 and T3 and T4 respectively are connected in the current switch configuration. An inhibit input is applied to the base of T1. A data input is applied to the base of T4. If the inhibit input to T1 is at the up logic level, T1 conducts with a resultant lowering of its collector potential which via conductor 6, renders T2 nonconductive. Due to the fact that resistor 8 has a relatively high value in relation to resistor 14, little current flows through resistors 10 and 12. The emitter-base junction of T3 is insufficiently forward biased to allow it to conduct.

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Inhibit Circuit

This is a logical inhibit circuit. It makes use of current switching techniques to provide extremely fast signal propagation times. Transistor pairs T1 and T2 and T3 and T4 respectively are connected in the current switch configuration. An inhibit input is applied to the base of T1. A data input is applied to the base of T4. If the inhibit input to T1 is at the up logic level, T1 conducts with a resultant lowering of its collector potential which via conductor 6, renders T2 nonconductive. Due to the fact that resistor 8 has a relatively high value in relation to resistor 14, little current flows through resistors 10 and 12. The emitter-base junction of T3 is insufficiently forward biased to allow it to conduct. The relatively high collector potential of T2 also maintains T4 in the nonconductive state notwithstanding the presence or absence of data signals at its base terminal.

When the inhibit input to T1 goes to the down logic level, T1 ceases conducting and its resulting collector potential rise biases T2 into conduction via cross coupling conductor 6. With T2 conductivity the voltage across the voltage divider consisting of resistors 10 and 12 establishes the base potential of T3 at the mid-point of the data input swing to T4. Thus the conditions for current switching are achieved. Specifically, if the data input is at the up logic level, T4 conducts all the current and T3 is rendered nonconductive. If the data input is at the down logical stat...