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Browse Prior Art Database

Keyboard to Register Data Entry System

IP.com Disclosure Number: IPCOM000093761D
Original Publication Date: 1966-Feb-01
Included in the Prior Art Database: 2005-Mar-06
Document File: 2 page(s) / 36K

Publishing Venue

IBM

Related People

Carey, EB: AUTHOR [+3]

Abstract

A storage or buffer register has a plurality of register positions 10. Each is connected to receive data from a system storage through And 11 and to transfer data back to system storage from the output of Or 12. A keyboard has a plurality of pivoted translucent keys 13. Each is associated with a register position 10 and with an indicator lamp 14. A positive output from Or 12 actuates an indicator driver 15 to energize lamp 14 and thus illuminate key 13 to indicate a 1 bit in position 10.

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Keyboard to Register Data Entry System

A storage or buffer register has a plurality of register positions 10. Each is connected to receive data from a system storage through And 11 and to transfer data back to system storage from the output of Or 12. A keyboard has a plurality of pivoted translucent keys 13. Each is associated with a register position 10 and with an indicator lamp 14. A positive output from Or 12 actuates an indicator driver 15 to energize lamp 14 and thus illuminate key 13 to indicate a 1 bit in position 10.

By closing a keyboard enabling switch 16, connected between ground and all of the switch commons of the keyboard, each key is rendered operative either to enter a 1 into position 10 by pressing key 13 to momentarily close switch 17 or to change a 1 to a 0 by pressing key 13 to momentarily close switch 18. When key 13 is not pressed, it occupies a neutral position in which both switches 17 and 18 are open.

The logic of position 10 provides storage of any entered data. An output of Or 12 is fed back to the input of And 19. Thus, a positive output of Or 12, in conjunction with a Not Master Clear and an open switch 18, produces a positive output of And 19 that is fed to Or 20. The negative output of Or 20 is fed into Or 12 to produce a positive output and thus retain the data.

A Master Clear signal fed into And 19 produces a negative output that is fed through Or 20 and Or 12 to produce a negative output and thus store a 0. A Master Load control...