Browse Prior Art Database

Message Exchange Circuit

IP.com Disclosure Number: IPCOM000093766D
Original Publication Date: 1966-Feb-01
Included in the Prior Art Database: 2005-Mar-06
Document File: 2 page(s) / 39K

Publishing Venue

IBM

Related People

Poulet, A: AUTHOR [+2]

Abstract

This message exchange circuit is used in time division switching and allows message exchange between a plurality of terminals.

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Message Exchange Circuit

This message exchange circuit is used in time division switching and allows message exchange between a plurality of terminals.

Each terminal p, q, r is connected to a bus through a low-pass filter, a resonant transfer circuit LiCi and a time slot switch Si with i = p, q or r. Three circuits 1, 2, 3 are respectively coupled to points P, Q, R. Each of these circuits comprises an inductance Lj, a capacitor Cj and a time slot switch Sj with j = 1 2 or 3. In the arrangement Li = Lj = L/2 and Ci = Cj = C.

Time slots are distributed as follows. Switches Sp, Sq, Sr are closed respectively during time slots tp, tq, tr. Switches S1, S2, S3 are closed respectively during time slots tp and to, tq and to, tr and to.

Assuming that a message is coming from terminal p, capacitor Cp, previously charged through the low-pass filter, transfers its charge to capacitor C1 during time slot tp. During time slot to capacitor C1 distributes its charge amongst capacitors C2 and C3. Then during time slot tq capacitor C2 transfers its charge to capacitor Cq. During time slot tr capacitor C3 transfers its charge to capacitor Cr. Finally capacitors Cq and Cr discharge through the low-pass filters thus sending the subject message to terminals q and r.

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