Browse Prior Art Database

Memory Package

IP.com Disclosure Number: IPCOM000093865D
Original Publication Date: 1966-Mar-01
Included in the Prior Art Database: 2005-Mar-06
Document File: 2 page(s) / 97K

Publishing Venue

IBM

Related People

Halvarson, EH: AUTHOR

Abstract

Memory planes in a chain store memory package can be arranged in pairs on opposite sides of common supports. Such arrangement increases the strength of the memory package without increasing its thickness.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 53% of the total text.

Page 1 of 2

Memory Package

Memory planes in a chain store memory package can be arranged in pairs on opposite sides of common supports. Such arrangement increases the strength of the memory package without increasing its thickness.

Memory chains 10 and 12 are arranged in two identical planes. One is on each side of epoxy substrate 14 having upstanding flanges 16 for separating the memory chains from one another. Each two memory chains in both planes, such as memory chains 10a and 10b, are joined together at one end and at that end electrically connected to ground plane 18. This is positioned between the memory planes and substrate 14. Except at its point of electrical connection to the memory chains, plane 18 is separated from the memory chains by insulating layer 20. The memory chains, the substrate, the ground planes, and the insulating layers are all apertured so that bit sense wires 22 can pass through the memory package at right angles to the memory planes.

Associated with each substrate 14 is diode pack 24. This mates with substrate 14 and contains the word bus bars 26, 28, 30 and 32 for the memory chains. Two bus bars 26 and 28 serve the memory chains on one side of substrate 14. The other two bus bars 30 and 32 serve the memory chains on the other side of substrate 14. One memory chain associated with each plane 18 is connected through a diode to one of the bus bars. The other memory chain associated with each ground plane 18 is connected through a diode to another of the bus bars. For example, memory chain 10a is connected through a diode to bus 26. Memory chain 10b is connected through a diode to bus 28. Connections to planes 18 bypass diodes 34 and are so...