Browse Prior Art Database

Peak Detection and Holding System

IP.com Disclosure Number: IPCOM000093893D
Original Publication Date: 1966-Mar-01
Included in the Prior Art Database: 2005-Mar-06
Document File: 2 page(s) / 65K

Publishing Venue

IBM

Related People

McCullough, JW: AUTHOR [+3]

Abstract

Storage system 10 functions to store a particular peak value of an analog signal system. Such storage is until the analog-to-digital converter, not shown, is available to digitize the stored value.

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Peak Detection and Holding System

Storage system 10 functions to store a particular peak value of an analog signal system. Such storage is until the analog-to-digital converter, not shown, is available to digitize the stored value.

In this system, by the variable sample width peak detector, it is possible to connect the storage capacitor into the charging circuit for a minimum length of time. Thus, the time for which the peak can be stored with a given accuracy is extended.

A peak detection and storage cycle is initiated by applying a positive signal W to condition And 11. An output pulse from oscillator 12 sets latch 13 and fires single-shot 14. With latch 13 set, And 11 passes a signal to storage control and storage circuit 15 to energize reed relay RR5 and close contacts RR5-1, to energize RR2 and close contacts RR2-1 and to apply a negative level to transistor T1. This activates constant current source transistor T2 for charging capacitor C1 through the circuit completed by closed contacts RR5-1.

The output E0' of 15 is applied to one input of comparator 18 which also has an input connected to receive the analog input signal. The output of 18 is applied to an input of And 19 which also has an input from And 16. The latter is conditioned by the output of 11 and passes a signal via Inverter 17 when 14 times out. If 19 passes a signal, sampling continues. Further, by inverting the output of 19 by Inverter 19, And 21 does not pass a signal for resetting 13. When...