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Dual Character Parity Technique for Linear Code

IP.com Disclosure Number: IPCOM000093939D
Original Publication Date: 1966-Apr-01
Included in the Prior Art Database: 2005-Mar-06
Document File: 2 page(s) / 31K

Publishing Venue

IBM

Related People

Rumble, DH: AUTHOR

Abstract

In a system for checking double word messages, one commonly employed checking technique is the interlacing of two check bits over both characters. This technique detects certain double error conditions such as two adjacent errors in the same character which are not detected by conventional parity checking on a character-by-character basis. In conventional interlace, the parity matrix for the double word message, character 1 and character 2, is illustrated in the upper drawing for two eight-bit words. Parity bit 1 checks bits 1, 9, 3, 11,5, 13, 7 and parity bit 2 checks bits 8,2, 10,4, 12,6, 14. The parity bits are developed in conventional fashion with each incoming bit and transmitted at the end of the message.

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Dual Character Parity Technique for Linear Code

In a system for checking double word messages, one commonly employed checking technique is the interlacing of two check bits over both characters. This technique detects certain double error conditions such as two adjacent errors in the same character which are not detected by conventional parity checking on a character-by-character basis. In conventional interlace, the parity matrix for the double word message, character 1 and character 2, is illustrated in the upper drawing for two eight-bit words. Parity bit 1 checks bits 1, 9, 3, 11,5, 13, 7 and parity bit 2 checks bits 8,2, 10,4, 12,6, 14. The parity bits are developed in conventional fashion with each incoming bit and transmitted at the end of the message.

The parity check matrix H for the upper drawing is 1010101010101010 0101010101010101

Using the equation for parity check matrices where error conditions are expressed by n over p = n! over n-p ! p!, there are fifty-six double error conditions which cannot be detected by conventional interlace. By modifying the parity check matrix as shown in the lower drawing, certain of the bits are made common to both characters. Parity bit 1 checks bits 1, 9,3, 10, 11, 5, 13,7, 14. Parity bit 2 checks bits 8, 1,2, 10,4, 12, 5,6, 14. The parity check matrix H for the lower drawing is 1010101011101110 1101110101010101

Using this technique, the number of undetected double error conditions computed according to the above equa...