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Browse Prior Art Database

Integratable Word Driver and Gate

IP.com Disclosure Number: IPCOM000093967D
Original Publication Date: 1966-Apr-01
Included in the Prior Art Database: 2005-Mar-06
Document File: 2 page(s) / 27K

Publishing Venue

IBM

Related People

Seitzer, D: AUTHOR [+2]

Abstract

This circuit is a power driver for a very high-speed magnetic matrix memory. It provides short rise times as well as short decay times for fast pulses even at high duty ratios. The circuit draws no standby current during pulse intervals and, therefore, consumes little power. As it consists only of transistors and resistors it facilitates circuit integration.

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Integratable Word Driver and Gate

This circuit is a power driver for a very high-speed magnetic matrix memory. It provides short rise times as well as short decay times for fast pulses even at high duty ratios. The circuit draws no standby current during pulse intervals and, therefore, consumes little power. As it consists only of transistors and resistors it facilitates circuit integration.

Power transistor T4 switches rapidly as long as it sees a low impedance at its base. This low impedance is provided by the shunt feedback transistor pair T1 and T2. This turns on rapidly as T1 is in common base connection. At the pulse trailing edge T1 turns off very rapidly thus interrupting the feedback loop T1, T2, R1. The current in T2 continues and produces a high positive voltage peak at the emitter of T1. To close the feedback loop for the pulse trailing edge transistor T3 is introduced. T3 is turned on by the mentioned voltage peak. To have the feedback loop last sufficiently long for complete turnoff of T4 the base of T3 is, in addition, connected to the emitter of T4 via resistor R2, where a positive voltage appears across R3 as long as T4 draws any current.

Transistor T5, which is in common base connection, favorably increases the total switching speed and high output current capabilities. T4 provides current gain with voltage gain below one. T5 provides voltage gain at unity current gain. The total power dissipation at high currents is thus distributed between two...