Browse Prior Art Database

Preferential Data Paths

IP.com Disclosure Number: IPCOM000094057D
Original Publication Date: 1966-May-01
Included in the Prior Art Database: 2005-Mar-06
Document File: 2 page(s) / 47K

Publishing Venue

IBM

Related People

Freiman, CV: AUTHOR [+3]

Abstract

One of the features of many large, scientific computers is their use of a bank of fast local registers for holding operands and intermediate results. These machines also employ several arithmetic units. It is common to use a full, minor machine cycle to transfer data from a local register to an arithmetic unit. Another minor cycle is used to return the answer to a local register. In case the arithmetic unit is a floating point adder, this data transfer time is equal to the time required for the addition itself.

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Preferential Data Paths

One of the features of many large, scientific computers is their use of a bank of fast local registers for holding operands and intermediate results. These machines also employ several arithmetic units. It is common to use a full, minor machine cycle to transfer data from a local register to an arithmetic unit. Another minor cycle is used to return the answer to a local register. In case the arithmetic unit is a floating point adder, this data transfer time is equal to the time required for the addition itself.

The basic reason these transfers require such a large amount of time is that the busses used service a large number of sources and destinations.

The system provides for direct paths between specified registers R0...R15 and specified arithmetic units AUO... AU 15 in addition to the general busses used. This saves, the two minor cycles previously required to transfer data back and forth between the local registers and the arithmetic units. In many cases an arithmetic operation can be executed in one minor cycle instead of three. During compilation, operands would be assigned registers according to the functional unit to be employed in executing the operation specified whenever possible. Similarly, machine control would choose the appropriate arithmetic unit if a choice exists when issuing instructions. This system is one in which only adder AUO is provided with a preferential path from registers R0 and R1. In other applications, the i...