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Memory Simultaneous Read Write

IP.com Disclosure Number: IPCOM000094090D
Original Publication Date: 1966-May-01
Included in the Prior Art Database: 2005-Mar-06
Document File: 2 page(s) / 48K

Publishing Venue

IBM

Related People

Mentzer, GD: AUTHOR

Abstract

The ferrite cores are arranged in a memory array with word lines formed in rows and bit-sense lines formed in columns. For a conventional read operation in such a memory, an addressed word line is energized with a full-select current level. This sufficient to switch all cores to their zero signifying polarity of magnetization. The flux change of any core that was in a 1 signifying polarity produces a voltage up on the bit-sense line that is detected by a sense amplifier. For a write operation, the addressed word line is energized with a half-select current in the appropriate polarity to switch the cores to a 1 signifying polarity. Selected bit drivers are turned on to energize bit-sense lines with half-select currents of the corresponding polarity.

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Memory Simultaneous Read Write

The ferrite cores are arranged in a memory array with word lines formed in rows and bit-sense lines formed in columns. For a conventional read operation in such a memory, an addressed word line is energized with a full-select current level. This sufficient to switch all cores to their zero signifying polarity of magnetization. The flux change of any core that was in a 1 signifying polarity produces a voltage up on the bit-sense line that is detected by a sense amplifier. For a write operation, the addressed word line is energized with a half-select current in the appropriate polarity to switch the cores to a 1 signifying polarity. Selected bit drivers are turned on to energize bit-sense lines with half-select currents of the corresponding polarity. Only those cores are switched that receive a half-select current on both lines. The memory of the upper drawing operates according to the pulse program of the lower drawing to simultaneously read on one word line and to write on another word line. The wave forms of the drawing show an example of a read-write sequence on word line B. The read operation on line B coincides with a write operation on line A and the write operation on line B coincides with a read operation on line C.

During the write operation on word line A, the latter is conventionally energized with a half-select current in the write polarity. Appropriate bit-sense lines are energized with half-select currents in the write polarity. Thus, on word line B, where the simultaneous read operation occurs, some cores receive a half- select current in the write polarity. For reading on word line B, the word line is energized with a 1 1/2 select current in the read polarity. Where the 1 1/2 select word line current...