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Single 3 Dimensional Memory Cell

IP.com Disclosure Number: IPCOM000094112D
Original Publication Date: 1966-May-01
Included in the Prior Art Database: 2005-Mar-06
Document File: 2 page(s) / 38K

Publishing Venue

IBM

Related People

Agusta, BA: AUTHOR [+2]

Abstract

The 3-dimensional memory cell consists of two transistors T and two resistors R connected as a direct-coupled trigger which provides the storage function. Two transistors and two diodes D function as a current switch which provides the interrogation read-write functions. Common mode transistor T1 furnishes the X-Y array selection capability for 3-dimensional memory cell operation.

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Single 3 Dimensional Memory Cell

The 3-dimensional memory cell consists of two transistors T and two resistors R connected as a direct-coupled trigger which provides the storage function. Two transistors and two diodes D function as a current switch which provides the interrogation read-write functions. Common mode transistor T1 furnishes the X-Y array selection capability for 3-dimensional memory cell operation.

The read operation of a particular bit is performed by the coincident excitation of the X-Y lines. Such causes a current to now through the diode which is electrically connected to the collector of the current switch D that has the highest base potential. Since the sensing is obtained from the diode bit line BOS, the presence of a current indicates a 1 state. Conversely the absence of a current indicates a 0 state. The circuit is arranged to prevent switch D ad T' from saturating, thus resulting in high-speed, nondestructive read operation. A minimum coincident drive pulse width of, for example, eight nanoseconds is generally required to insure complete reading of the memory cell.

The write operation is carried out by the multicoincidence of the X-Y line excitation and a decrease of the respective bit, 0 or 1, line to a level which permits saturation. These conditions force the respective switch D into saturation. If the cell is in the complementary state, the following occurs. The saturated base current is initially supplied by the base majority carrier...