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High Speed Logic Circuit

IP.com Disclosure Number: IPCOM000094113D
Original Publication Date: 1966-May-01
Included in the Prior Art Database: 2005-Mar-06
Document File: 2 page(s) / 29K

Publishing Venue

IBM

Related People

Mathews, K: AUTHOR [+2]

Abstract

This circuit provides complementary outputs in response to a logic input to a current switch. A feedback circuit is used to both speed up the operation of the logic circuit and provide it with temperature compensation.

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High Speed Logic Circuit

This circuit provides complementary outputs in response to a logic input to a current switch. A feedback circuit is used to both speed up the operation of the logic circuit and provide it with temperature compensation.

Transistors T1 and T2 in drawing A are connected in current switch configuration. A logic input is applied at terminal X. Complement and true outputs are taken via collector terminals 1 and 2. Both T1 and T2 are connected through a common split emitter resistor R1 and R2 to source -V. The potential at point Y, the base of T2, is established via the current flow through the path +V2, R3, D1, R4, and R2 to -V. D1 is continually conductive. Its level of conduction is controlled by the potential at the junction of R1 and R2. Capacitor C is utilized to delay the effect of the feedback upon the base circuit of T2.

When the X input of drawing B is at its down or most negative level, the common emitter node voltage is at its most negative level as is the potential at the junction of R1 and R2. Nevertheless the potential at point Y is more positive than the X potential. As a result, T2 conducts and the potential at 2 is down. As the X potential switches positively, T1 commences to conduct as soon as the X potential is more positive that the Y potential. The potential at the junction of R1 and R2 rises, decreasing the conduction through D1 and R4. This results in an increase in the base potential at point Y, delayed by time t due to...