Browse Prior Art Database

Wire Laminate NDRO Memory

IP.com Disclosure Number: IPCOM000094216D
Original Publication Date: 1966-Jul-01
Included in the Prior Art Database: 2005-Mar-06
Document File: 2 page(s) / 42K

Publishing Venue

IBM

Related People

Leilich, HO: AUTHOR

Abstract

This wire-laminate memory structure is comprised of chain-like memory elements, and is operated in NDRO.

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Wire Laminate NDRO Memory

This wire-laminate memory structure is comprised of chain-like memory elements, and is operated in NDRO.

The basic memory element is comprised of two portions, store portion 1 and read portion 2. Word-write strip 3 and read strip 4 are provided, as well as a bit wire 5 and a sense loop 6. These wires are transverse to the plane of the memory element. Flux closure over the gaps can be enhanced by magnetic keepers. A more extensive, two two-dimensional array is shown.

For the write operation, a word-write current I(w) is applied and, at the same time, a bit current is applied. This causes an orthogonal write process. A small portion of the flux is directed by gap 8 to the allotted section 2 of read strip 4, which is consequently magnetized lengthwise according to the information stage of the store portion 1.

For the read operation, a word-read pulse 1 is applied, causing read strip 4 to be orientated circumferentially, thus destroying the longitudinal flux components in all devices of the selected word. Sense loops 6 are provided to detect the flux change.

The gap 7 has enough reluctance to provide the necessary retention flux for the stability of the device against bit disturb pulses. Since only a small part of the bit flux can be destroyed by the read pulse, the device stability is virtually unaffected by the read current amplitude.

The complete memory is fabricated in a laminate structure in which the copper laminate pattern is held tog...