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Fabrication of Two Surface Devices

IP.com Disclosure Number: IPCOM000094226D
Original Publication Date: 1966-Jul-01
Included in the Prior Art Database: 2005-Mar-06
Document File: 2 page(s) / 59K

Publishing Venue

IBM

Related People

Regh, J: AUTHOR

Abstract

Thin, polished semiconductor wafer 1 composed of the desired final device base resistivity material forms the starting substrate for the fabrication procedure. Mask 2 of the desired device pattern is provided using conventional photoresist techniques. The exposed silicon is then etched down, for example, approximately ten to fifteen microns, leaving the drawing A structure. The photoresist coating which forms mask 2 is then removed by conventional solvent techniques. A second mask pattern is applied by photoresist techniques to the raised portions of silicon wafer 1. The latter is oxidized to create silicon oxide coating 4 with a small silicon opening 3 on each raised portion of the silicon wafer surface. The mask is then removed by conventional technique s.

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Fabrication of Two Surface Devices

Thin, polished semiconductor wafer 1 composed of the desired final device base resistivity material forms the starting substrate for the fabrication procedure. Mask 2 of the desired device pattern is provided using conventional photoresist techniques. The exposed silicon is then etched down, for example, approximately ten to fifteen microns, leaving the drawing A structure. The photoresist coating which forms mask 2 is then removed by conventional solvent techniques. A second mask pattern is applied by photoresist techniques to the raised portions of silicon wafer 1. The latter is oxidized to create silicon oxide coating 4 with a small silicon opening 3 on each raised portion of the silicon wafer surface. The mask is then removed by conventional technique s.

Wafer 1 is placed in a diffusion chamber and a first diffusion is performed through holes 3 to produce a PN junction 5 as shown in drawing B. Wafer 1 is then placed in a suitable chamber for growing polycrystalline silicon. Polycrystalline silicon layer 6 is grown over coating 4 on wafer 1. During the growth of layer 6, cones 8 of single crystalline silicon are formed through openings 3.

The wafer is inverted and the original substrate material 1 is etched down until only small bits of totally isolated material 1 remain as shown in drawing C. Another suitable mask is applied by photoresist techniques to the exposed surface of the remaining original material 1. A second diffu...