Browse Prior Art Database

High Speed IGFET Flip Flop

IP.com Disclosure Number: IPCOM000094233D
Original Publication Date: 1966-Jul-01
Included in the Prior Art Database: 2005-Mar-06
Document File: 2 page(s) / 28K

Publishing Venue

IBM

Related People

Michael, LA: AUTHOR [+2]

Abstract

The bistable device of drawing A is comprised of field effect transistors 1 and 2 of the insulated gate type. These are switched from the state to another at significantly greater speeds in relation to the power consumption.

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High Speed IGFET Flip Flop

The bistable device of drawing A is comprised of field effect transistors 1 and 2 of the insulated gate type. These are switched from the state to another at significantly greater speeds in relation to the power consumption.

As seen in drawing B, source 3 of each transistor is connected directly to the transistor substrate 4. Thus, advantage is taken of the substrate to drain junction diode to obtain a low impedance drive in forcing the transistor drain from ground to positive when switching the device from one state to the other.

Drawing C shows the operation of the bistable device. The input terminals X and Y are normally at ground potential. One transistor is on and the other off. Each time that a positive-going signal is applied to X, the signal is coupled through the substrate to drain diode junction to output terminal W. This positive potential is applied to the gate of 2, turning the latter on to apply ground potential to the gate of 1 by way of Z. When the input signal is returned to ground potential, the potentials applied to the gates of 1 and 2 maintain the devices respectively off and on. In a similar manner, positive pulses at Y turn 1 and 2 on and off respectively.

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