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Monolithic Integrated Semiconductor Structure Having Epitaxially Formed Base Regions

IP.com Disclosure Number: IPCOM000094414D
Original Publication Date: 1966-Oct-01
Included in the Prior Art Database: 2005-Mar-06
Document File: 2 page(s) / 41K

Publishing Venue

IBM

Related People

Agusta, BA: AUTHOR [+2]

Abstract

This integrated monolithic semiconductor structure is fabricated using two diffusion operations for the collector and emitter regions and an epitaxial operation for the base regions.

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Monolithic Integrated Semiconductor Structure Having Epitaxially Formed Base Regions

This integrated monolithic semiconductor structure is fabricated using two diffusion operations for the collector and emitter regions and an epitaxial operation for the base regions.

In drawing A, substrate 1 of P- type conductivity having extension portions 2 of P/+/ type conductivity, formed by conventional diffusion techniques, surrounds moats 3 that are formed in substrate 1. A layer of insulating material 4 such as silicon dioxide is formed over portions 2. In drawing B, an N-type diffusion operation is performed to form the substantially cup-shaped N-type regions 5. In drawing C, a P-type epitaxial growths 6 are carried out on the etched-out regions so as to form PN junctions 7 between the epitaxially grown P-regions and the diffused N-regions. At this point in the fabrication process, semiconductor diodes are formed and ohmic contacts can be made to the surface regions of the P-type and N-type areas. If desired, transistor regions can be formed by a second N- type diffusion operation into the P-type regions thus forming an NPN device.

PNP devices can be made in the same manner by using the opposite starting material and opposite conductivity dopants for the diffusion operations. The structure shown is a high-speed monolithic integrated device. If desired, compatible PNP and NPN devices can be formed by use of an extra diffusion operation in the desired regions.

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