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Browse Prior Art Database

Monolithic, Integrated Semiconductor Device

IP.com Disclosure Number: IPCOM000094417D
Original Publication Date: 1966-Oct-01
Included in the Prior Art Database: 2005-Mar-06
Document File: 2 page(s) / 45K

Publishing Venue

IBM

Related People

Agusta, BA: AUTHOR [+2]

Abstract

This monolithic, integrated semiconductor device utilizes PN junctions for electrically isolating individual devices in the monolithic structure.

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Monolithic, Integrated Semiconductor Device

This monolithic, integrated semiconductor device utilizes PN junctions for electrically isolating individual devices in the monolithic structure.

In drawing A, boxes 1 represent the semiconductor surface that is exposed by grid pattern 2. The latter is a dielectric material such as silicon dioxide which is located on the monolithic semiconductor surface. The openings defined by pattern 2 expose the plurality of semiconductor surfaces 1.

In B, a sectional view taken on the line B-B of drawing A, pattern 2 is located above the isolating surface portions of the substrate material, in this situation P. However, the substrate material can also be N-, if desired. Such means that the other type region shown in this drawing is of opposite conductivity. The surface P- regions which surround N regions 4 serve to electrically isolate, by the conventional PN junction techniques under reverse bias conditions, each of the N regions. The N regions 4 are formed by a diffusion operation through the openings in pattern 2 on the surface of the semiconductor device.

Subsequently, by conventional base and emitter diffusions, transistor devices can be formed which are isolated from each other. If desired, a P-type base diffusion could be used to prevent surface inversion between adjacent N-type regions.

In C, the diffusion operation of N-type dopants into the P- substrate serves to overcompensate P- to N-type in the regions desired. This dif...