Browse Prior Art Database

Diode Matrix Memory Drive

IP.com Disclosure Number: IPCOM000094448D
Original Publication Date: 1965-Jan-01
Included in the Prior Art Database: 2005-Mar-06
Document File: 2 page(s) / 45K

Publishing Venue

IBM

Related People

Higgins, PP: AUTHOR

Abstract

Symmetrical connections of read and write driver and gate systems in a matrix memory provide faster operation by localizing the capacitive discharge which the drivers must face and by localizing the capacitive charge which the gates must face.

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Diode Matrix Memory Drive

Symmetrical connections of read and write driver and gate systems in a matrix memory provide faster operation by localizing the capacitive discharge which the drivers must face and by localizing the capacitive charge which the gates must face.

The normal read-write cycle requires that current pass first in one direction and then in the other along a selected core winding wire. Before current can pass, it is necessary that the capacitance of all the windings common to the selected gate be charged to the drive voltage and that the capacitance of all the windings common to the selected driver be discharged. This absorbs power and takes time. The symmetrical arrangement of read and write drive systems and diodes retains the charge and discharge developed during the read interval. Thus, it is unnecessary to charge the windings common to the selected gate and unnecessary to discharge the windings common to the selected driver for the immediately following write interval.

Suppose RG1 and RD1 are selected for the read interval. Then WG1 and WD1 are selected for the write interval. During the read interval, RG1 charges lines 2 and 3 and RD1 discharges lines 4 and 7. Line 1 is selected and is driven. During the write interval, lines 2 and 3 remain charged and lines 4 and 7 remain discharged. The only current now occurs on line 1.

This description has assumed that the lines charge through the gate and discharge through the driver. If the converse w...