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Browse Prior Art Database

Sequence Check Circuit

IP.com Disclosure Number: IPCOM000094579D
Original Publication Date: 1965-Mar-01
Included in the Prior Art Database: 2005-Mar-06
Document File: 2 page(s) / 30K

Publishing Venue

IBM

Related People

Athens, AS: AUTHOR

Abstract

The circuit is for sequence checking data from a series of record cards.

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Sequence Check Circuit

The circuit is for sequence checking data from a series of record cards.

Binary counter 10 has a capacity equal to the number of index points for the record card machine. The counter is advanced one step for each index point by an advance pulse applied to terminal 12. Counter 10 is reset by a signal to reset input 14. The signal generated by sensing data in the selected column of the record is coupled to terminal 14 to reset counter 10. For example, if data representing an 8 is sensed in the selected column of a first card as in the upper drawing, counter 10 is reset at this point. Counter 10 is advanced one step for each of the index points through which the record card is moved.

If data representing an 8 is sensed in the second card, a carry pulse on line 18 is not generated. And 16 is not conditioned so that no Sequence Error signal occurs at terminal 20. However, if data representing a 7 is sensed in the second card, a carry pulse is generated at 8 index time before a data signal is present to reset counter 10. The absence of the data signal is then coupled through inverter 22 to condition And 16 and thus generate a Sequence Error signal at terminal 20.

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