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Simulating Matched Pair Transistors

IP.com Disclosure Number: IPCOM000094603D
Original Publication Date: 1965-Mar-01
Included in the Prior Art Database: 2005-Mar-06
Document File: 2 page(s) / 23K

Publishing Venue

IBM

Related People

Berding, AR: AUTHOR

Abstract

This method produces a matched pair of transistors. The transistors are produced on a substrate along with the resistors for the circuit.

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Simulating Matched Pair Transistors

This method produces a matched pair of transistors. The transistors are produced on a substrate along with the resistors for the circuit.

First connect pin 2 to ground and pin 1 to +V volts. A predetermined current 11 is then obtained at pin 1 by varying the negative potential at pin 4. Resistor R1 is then trimmed until a predetermined voltage V1 appears across pins 2 and 3 while maintaining current 11. A predetermined voltage V2 is then coupled to pin 4 and resistor R2 is trimmed until current 11 is measured at pin 1.

The same steps are repeated using transistor 2 and its corresponding connections and resistors. Connect pin 3 to pin 6 and connect pin 2 to a predetermined input voltage V3. Trim resistor R3 until a predetermined current 12 is measured at pin 1. The circuit is then perfectly matched for Vbe and transconductance.

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