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Translator

IP.com Disclosure Number: IPCOM000094658D
Original Publication Date: 1965-Apr-01
Included in the Prior Art Database: 2005-Mar-06
Document File: 2 page(s) / 48K

Publishing Venue

IBM

Related People

O'Connor, LT: AUTHOR [+2]

Abstract

This is a system for translating, character by character, from one code to another. Delay line 2 and regenerator 4 provide the serial storage capacity for holding all characters of a code of random nature, e.g., a code having no set sequence such as a cryptological code as distinguished from a BCD code. Bit counter 6 is a free-running clock and provides the central timing for the translator. The output of counter 6 is fed to regenerator 4 and serves to synchronize the bits circulating in delay 2. Character counter 8 also receives the output from counter 6 and generates an ordered sequence of binary characters in accordance with the count of counter 6.

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Translator

This is a system for translating, character by character, from one code to another. Delay line 2 and regenerator 4 provide the serial storage capacity for holding all characters of a code of random nature, e.g., a code having no set sequence such as a cryptological code as distinguished from a BCD code. Bit counter 6 is a free-running clock and provides the central timing for the translator. The output of counter 6 is fed to regenerator 4 and serves to synchronize the bits circulating in delay 2. Character counter 8 also receives the output from counter 6 and generates an ordered sequence of binary characters in accordance with the count of counter 6. For example, it is assumed that counter 8 is a four to one binary-coded decimal counter which provides an increasing BCD character count for each four bit count provided by counter 6. It is also assumed that each random code character in delay 2 is composed of four bits. Thus, there is a direct character for character correspondence between the ordered code characters as generated by counter 8 and the random code characters as are circulating in delay 2. The corresponding ordered code character is generated upon the initiation of the first bit of the random code character. In the timing diagram, that is indicated by the serially occurring random code characters and the simultaneously appearing ordered code BCD characters.

In order to translate from the ordered code to the random code, an ordered code char...