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Checking Apparatus for Cyclic Code Generator and Checker

IP.com Disclosure Number: IPCOM000094704D
Original Publication Date: 1965-May-01
Included in the Prior Art Database: 2005-Mar-06
Document File: 2 page(s) / 31K

Publishing Venue

IBM

Related People

Sorg, JH: AUTHOR

Abstract

A cyclic code generator and checker circuit is used in recording systems for checking the recorded data. This apparatus detects any hardware errors in the generator and checker circuitry or in the transfer of data to this circuitry. It also checks for the failure of the associated circuitry, including the parity generator and the parity accumulator.

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Checking Apparatus for Cyclic Code Generator and Checker

A cyclic code generator and checker circuit is used in recording systems for checking the recorded data. This apparatus detects any hardware errors in the generator and checker circuitry or in the transfer of data to this circuitry. It also checks for the failure of the associated circuitry, including the parity generator and the parity accumulator.

In the recording system, eight-bit bytes of data are entered into a buffer register in parallel. The register also has a parity position. The parity of each byte of data entered into the register is accumulated in a parity accumulator. This circuit has the form of a binary trigger.

The bytes of data are also applied in parallel to the cyclic code generator and checker having a generator polynomial which is a multiple of X + 1. This circuit has the form of a plurality of shift register positions arranged with appropriate interconnections to provide a character for checking the recorded data. The contents of this circuit are also continually applied to a parity generator which performs the sum modulo-two addition function. The parity generator and the parity accumulator are each coupled to a comparator circuit which has the form of an Exclusive-Or circuit.

The comparator operates on the principle that the cumulative sum modulo- two of all data entered into the cyclic code generator, as represented by the accumulated parity, is equal to the sum modulo-two of the co...