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Logic Diagnostic Test

IP.com Disclosure Number: IPCOM000094734D
Original Publication Date: 1965-May-01
Included in the Prior Art Database: 2005-Mar-06
Document File: 2 page(s) / 47K

Publishing Venue

IBM

Related People

Hoefs, GH: AUTHOR

Abstract

Test circuitry in the control unit of a magnetic character reader is shown. It has trigger 10 and latch 11 with connecting logic gates for each of the two CMC-7 character recognition channels and a switch. This enables the running of logic diagnostic test programs on the interconnected processing unit. During these, no documents are read, but the program generates diverse character bar patterns in the reader. These are correct or faulty patterns in either one channel and equal or different patterns in both channels concurrently. The reader outputs are compared with the correct interpretations of these patterns. These comparisons lead the program to print out the location of any faulty printed circuit cards in the recognition logic, character register, and readout translator of the magnetic character reader.

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Logic Diagnostic Test

Test circuitry in the control unit of a magnetic character reader is shown. It has trigger 10 and latch 11 with connecting logic gates for each of the two CMC- 7 character recognition channels and a switch. This enables the running of logic diagnostic test programs on the interconnected processing unit. During these, no documents are read, but the program generates diverse character bar patterns in the reader. These are correct or faulty patterns in either one channel and equal or different patterns in both channels concurrently. The reader outputs are compared with the correct interpretations of these patterns. These comparisons lead the program to print out the location of any faulty printed circuit cards in the recognition logic, character register, and readout translator of the magnetic character reader.

The circuitry for one channel is shown in simplified form. The signaling lines 14, 15, 17, 18, and four lines 20, are part of the interface between the reader and the CPU. During routine document reading they are used for other purposes than what is shown here. Operation in test mode is enabled by activating switch line 12. The program simulates detection of a character bar by turning on the bar trigger, not shown, in the recognition logic. This is effected by a first instruction followed by a second instruction. The first instruction activates line 14 to turn on trigger 10. The second instruction activates line 15 to pass a signal through gate
16. The trailing edge of pulse 15 resets trigger 10 and latch 11. This frees the clock, reset by the bar trigger turning on, and a new clock cycle thus is started.

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