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Analog Multiplier

IP.com Disclosure Number: IPCOM000094818D
Original Publication Date: 1965-Jun-01
Included in the Prior Art Database: 2005-Mar-06
Document File: 2 page(s) / 31K

Publishing Venue

IBM

Related People

French, WK: AUTHOR

Abstract

The circuit yields a voltage on terminal 4 which is equal to the product, multiplied by a constant, of the voltages A and B applied, respectively, to input terminals 2 and 3. The product, although constantly available because of voltage storing hold circuit 9, is periodically changed by applications of sampling pulses. These are applied to input terminal 5 to open gates 6 and 7 to recharge capacitors C2 and C1. Such recharging is to a fixed reference voltage V, +10 volts, and the multiplier voltage A, respectively.

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Analog Multiplier

The circuit yields a voltage on terminal 4 which is equal to the product, multiplied by a constant, of the voltages A and B applied, respectively, to input terminals 2 and 3. The product, although constantly available because of voltage storing hold circuit 9, is periodically changed by applications of sampling pulses. These are applied to input terminal 5 to open gates 6 and 7 to recharge capacitors C2 and C1. Such recharging is to a fixed reference voltage V, +10 volts, and the multiplier voltage A, respectively.

Capacitors C1 and C2 are identical, as are resistors R1 and R2. Thus, C1 and C2 discharge along identical discharge curves, each from its respective initial charge. The multiplicand entry B is compared against the voltage V2 stored in C2. Upon equality, gate 8 is opened to pass the voltage V1 on C1 to storage and hold circuit 9. Filter 10 smooths the output.

Multiplication is effected because of the following relationships:

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