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Timed Pulse Generator with a Sine Wave Input

IP.com Disclosure Number: IPCOM000094894D
Original Publication Date: 1965-Jun-01
Included in the Prior Art Database: 2005-Mar-06
Document File: 2 page(s) / 69K

Publishing Venue

IBM

Related People

Chomicki, JS: AUTHOR

Abstract

This pulse generator provides a number of pulses of fixed relative timing from a single cycle of a low-frequency sine wave without phase ambiguity. It consists basically of a series of interconnected and cascaded phase shifters 2...10 and associated zero crossing detectors 12...20. Each shifter receives an input sine wave from input 10 or from a preceding shifter. Each shifter produces an output sine wave of the identical frequency and amplitude but phase shifted by an angle determined by the circuit parameters. The detectors, as the name implies, receive the associated sine wave and yield a fixed amplitude output pulse of constant duration. This occurs whenever the input sine wave passes through a fixed threshold voltage with a positive rate of change.

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Timed Pulse Generator with a Sine Wave Input

This pulse generator provides a number of pulses of fixed relative timing from a single cycle of a low-frequency sine wave without phase ambiguity. It consists basically of a series of interconnected and cascaded phase shifters
2...10 and associated zero crossing detectors 12...20. Each shifter receives an input sine wave from input 10 or from a preceding shifter. Each shifter produces an output sine wave of the identical frequency and amplitude but phase shifted by an angle determined by the circuit parameters. The detectors, as the name implies, receive the associated sine wave and yield a fixed amplitude output pulse of constant duration. This occurs whenever the input sine wave passes through a fixed threshold voltage with a positive rate of change.

In drawing A, the basic timing sine wave at 1 controls detector 11 to yield an output pulse with no delay. Shifters 2 and 3 with 50 degrees and 60 degrees delays and their inputs connected in parallel to 1 yield the 50 degrees and 60 degrees delayed pulses.

Shifter 4, receiving as an input the 50 degrees delayed sine wave from shifter 2 adds 60 degrees of delay to yield the 110 degrees pulse from detector 4. The final shifter 10 applies its 50 degrees delay to the input sine wave which has been successively delayed in units 3 (60 degrees delay), 6 (80 degrees delay), 8 (60 degrees delay), 9 (60 degrees delay) and the terminal shifter 10 (50 degrees delay) to yield the 310 degrees delay at 20. Other combinations of series and series-parallel connect...