Browse Prior Art Database

Analog to Digital Converter

IP.com Disclosure Number: IPCOM000094923D
Original Publication Date: 1965-Jul-01
Included in the Prior Art Database: 2005-Mar-06
Document File: 2 page(s) / 45K

Publishing Venue

IBM

Related People

Miran, R: AUTHOR

Abstract

This analog-to-digital converter includes reversible counter 2, output register 3, digital-to-analog converter 4, and comparator 5.

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Analog to Digital Converter

This analog-to-digital converter includes reversible counter 2, output register 3, digital-to-analog converter 4, and comparator 5.

An unknown analog signal. applied to one input of comparator 5 is compared to the feedback analog voltage from digital-to-analog converter 4, representing the numerical content of counter 2. The comparison results in one of three output signals from comparator 5. Counter advance indicates the unknown signal to be greater than the feedback voltage. Counter stop indicates the unknown signal to be equal to the feedback voltage. Counter reverse indicates the unknown signal to be less than the feedback voltage.

T' is the clock signal and is fed to And's 6 and 7. The other inputs are energized by the countup and countdown outputs from comparator 5. The outputs of And's 6 and 7 cause counter 2 to increment at T' time.

The next clock signal T energizes transfer circuit 8 to move the data content of counter 2 into output register 3. At the same time. And's 9 and 10 operate to set the low-order position of register 3 to 0 state, through Or 11 if the countup signal is present, or to the 1 state, through Or 12 if the countdown signal is present.

Precision and output data rate from the device are roughly doubled by the addition of an extra, low-order position in output register 3. Trigger R1 in this position is set or reset at a point midway between the times for setting the counter. When output of comparator 5 indicat...