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Logic Voltage Coupling Circuit

IP.com Disclosure Number: IPCOM000094967D
Original Publication Date: 1965-Jul-01
Included in the Prior Art Database: 2005-Mar-06
Document File: 2 page(s) / 29K

Publishing Venue

IBM

Related People

Swan, EW: AUTHOR

Abstract

Write driving circuit 10 is isolated from safety line circuit 16. The latter has input terminal 18 coupled to the collector at terminal 20 of write gating transistor T21 by coupling transistor T22 operated in the inverted mode.

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Logic Voltage Coupling Circuit

Write driving circuit 10 is isolated from safety line circuit 16. The latter has input terminal 18 coupled to the collector at terminal 20 of write gating transistor T21 by coupling transistor T22 operated in the inverted mode.

In the writing mode, a translated trigger output at the bases of write driver transistors T24 and T25 holds energizing voltage terminal 26 at a voltage, +20 volts, relatively high with respect to the logic voltage levels, nominally 0 and +3. Current source 28 provides write current through one T24 or T25 depending on which transistor is conducting. The normal relatively high voltages, about 20 volts, at terminals 26 and 20 are isolated from the following terminal 18 by T22. Any possible loading at terminal 18 is also isolated from the terminal 20. Such prevents any current flow through resistor 29 which would lower the write current and add to the tolerance on the write current in the output leads of T24 and T25.

When write gating terminal 30 is opened, the logic level voltage through resistor 31 turns T21 on. Current is drawn through resistor 29 sufficiently to lower the voltage at terminal 26 to a value less than +18 volts. This back-biases the base-emitter junctions of T24 and T25. They turnoff even though a signal may exist on their bases. When T21 is conducting, terminal 20 is at the collector- emitter voltage of T21. Terminal 18 is more positive than terminal 20 by a few millivolts. This is because T22...