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Phase Distinguishing Circuit

IP.com Disclosure Number: IPCOM000094973D
Original Publication Date: 1965-Jul-01
Included in the Prior Art Database: 2005-Mar-06
Document File: 2 page(s) / 34K

Publishing Venue

IBM

Related People

Simanavicius, K: AUTHOR

Abstract

Detection of the recorded 1 and 0 bits in a phase-encoded recording system is performed. The circuit determines if a readback signal is in-phase or 180 degrees out-of-phase with a locally provided synchronous phase reference signal. The detection is performed on the peak-to-peak values of the readback signal.

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Phase Distinguishing Circuit

Detection of the recorded 1 and 0 bits in a phase-encoded recording system is performed. The circuit determines if a readback signal is in-phase or 180 degrees out-of-phase with a locally provided synchronous phase reference signal. The detection is performed on the peak-to-peak values of the readback signal.

The circuit comprises a modified full-wave rectifier including transistors T1 and T2. Readback signal C and its complement signal D are provided to the T1 and T2 emitters, respectively. Inputs C and D are also cross coupled for application to the T1 and T2 bases. The rectifier outputs are such that only one is provided at a given time.

Transistors T3 and T6 receive the output from T1 at their emitters. The output from T2 is applied to the emitters of transistors T4 and T5. Reference signal B, locally supplied, is applied to the T3 and T5 bases. The complement of signal B, signal E, is applied to the T4 and T6 bases. Each T3...T6 acts as an And accepting a rectified form of the readback signal and a reference signal.

Squelch current pulse A is applied through diodes to the T3...T6 collectors for establishing a reference voltage at the end of each bit period. The T3 and T4 outputs are commoned at node F. The T5 and T6 outputs are commoned at node G. During the bit period time, the current from a conducting T1 or T2 is steered by T3... T6 to one capacitor C1 or C2. This depends on the relative phasing between the readback signal C a...