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Decrementer

IP.com Disclosure Number: IPCOM000095019D
Original Publication Date: 1965-Aug-01
Included in the Prior Art Database: 2005-Mar-06
Document File: 2 page(s) / 44K

Publishing Venue

IBM

Related People

Shelly, JH: AUTHOR

Abstract

A plurality of registers 1...4, each having a plurality of binary bits, is normally utilized to store unrelated binary numbers. If a number in one register is to be decremented, the contents of such register are gated through an associated Gate 10...13, through Or 15 to decrementer 16. The contents are then gated back into the same register through an associated one of Gates 17...20.

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Decrementer

A plurality of registers 1...4, each having a plurality of binary bits, is normally utilized to store unrelated binary numbers. If a number in one register is to be decremented, the contents of such register are gated through an associated Gate 10...13, through Or 15 to decrementer 16. The contents are then gated back into the same register through an associated one of Gates 17...20.

There are times, however, when it is desired to logically combine all registers to contain a single value which must be decremented. It is desirable to accomplish this through decrementer 16 which has a length only equal to the largest register 1...4. Therefore, logic is provided to determine which register 1...4 is to be gated through decrementer 16 to decrement the entire number.

Triggers T1...T3 are provided and are set to indicate that the associated register has an all 0's condition in the binary positions.

It is the function of Inverters 21...23 and And's 24...26 to determine the lowest ordered register which does not contain all 0's. The lowest order register which does not contain all 0's is the register gated out through the associated one of Gates 10...13, through decrementer 16 back to the same register, with the value decremented by one.

In a normal counting operation, all of the lower ordered 0's of the number should be complemented to binary one. It is the function of a series of And's
27...29 to detect the registers which contain all 0's. The output of And'...