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Data Conversion Routines Employing a Read Only Control Store as a Table Look Up Medium

IP.com Disclosure Number: IPCOM000095083D
Original Publication Date: 1965-Sep-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 3 page(s) / 40K

Publishing Venue

IBM

Related People

Thomas, J: AUTHOR

Abstract

In a data processing system including a read-only control store, certain frequently performed data conversion routines can be speeded up by permanently storing a conversion table in the control store instead of in a slower operating read-write store. An example is an address notation conversion required when one processing system is executing a program prepared for another system by emulating the internal activities of the other system.

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Data Conversion Routines Employing a Read Only Control Store as a Table Look Up Medium

In a data processing system including a read-only control store, certain frequently performed data conversion routines can be speeded up by permanently storing a conversion table in the control store instead of in a slower operating read-write store. An example is an address notation conversion required when one processing system is executing a program prepared for another system by emulating the internal activities of the other system.

Read-only control store RS cyclically delivers binary digital microinstruction control words to its output buffer register DR from internal address locations selected in accordance with the contents of its data register AR. The cycles of RS are of the same duration and frequency as the elemental cycles of the data processing system CPU controlled by RS. Certain of the bits G in each micro- instruction word received by DR are ordinarily used to control gates in CPU. Other bits in DR are ordinarily effective to control microprogram sequencing logic SL. This selectively determines the next cyclic address entry to AR in accordance with either current processing conditions in CPU, as represented by CPU status signals S, or the instruction operation code portions OP of main program instructions held in register M. Alternatively, certain bit segments in a special subset of micro-instruction words in RS may be used as table look-up conversion intelligence when received in DR.

Additional controls C can be provided which react only to microinstructions in the special conversion subset. These controls connect a group of DR bit lines to CPU intelligence receiving lines TL. At such times other of the DR bits G condition gates in CPU. Such gating moves the information on lines TL, together with information held in a CPU register L, through the CPU adder A and to transfer the sum output of A to L. Micro-instructions in the special subset are also effective to condition SL to branch according to an argument va...