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Formation of Depletion and Enhancement Mode Field Effect Transistors

IP.com Disclosure Number: IPCOM000095170D
Original Publication Date: 1965-Sep-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 3 page(s) / 48K

Publishing Venue

IBM

Related People

Lehman, HS: AUTHOR [+2]

Abstract

This technique forms at least one pair of field effect transistors. One pair is of the enhancement mode type, normally off. The other pair is of the depletion mode type, normally on.

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Formation of Depletion and Enhancement Mode Field Effect Transistors

This technique forms at least one pair of field effect transistors. One pair is of the enhancement mode type, normally off. The other pair is of the depletion mode type, normally on.

In the depletion mode device, insulating material, located in between the gate electrode and the N-type channel formed at the surface of the P-type substrate between the two regions of N-type conductivity, is composed of SiO(2). In the enhancement mode device, insulating material, located between the gate electrode and the surface of the P-type semiconductor substrate, is composed of glass. This is preferably of the borosilicate type such as PYREX*. This glass has a coefficient of expansion substantially close to the coefficient of expansion of silicon.

The gate electrode for the depletion mode device is selected from any one of the group of materials consisting of Al, Mg, Ti, Cr, and Si. Under heat treatment at temperatures in the range of 300-700 degrees C. an N-type inversion takes place on the surface of the P-type substrate to form an electrically conductive channel between the two N-type regions. In this manner, a conductive channel is formed beneath the silicon dioxide insulating layer. No such channel is formed beneath the glass insulating layer despite the material used for the gate electrode. *Trademark of the Corning Glass Works. This is because the glass layer acts as a barrier to the formation of a chan...