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Forming Isolated Semiconductor Regions for Integrated Circuits

IP.com Disclosure Number: IPCOM000095244D
Original Publication Date: 1965-Oct-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 35K

Publishing Venue

IBM

Related People

Doo, VY: AUTHOR

Abstract

This method forms isolated semiconductor regions from which semiconductor devices can be fabricated for use in integrated circuits. Using, for example, an N+ monocrystalline silicon substrate wafer, a region of N-type conductivity is epitaxially grown on it. Subsequently, a layer of insulating material, such as a layer of silicon dioxide, is grown on the N-type region as in drawing A.

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Forming Isolated Semiconductor Regions for Integrated Circuits

This method forms isolated semiconductor regions from which semiconductor devices can be fabricated for use in integrated circuits. Using, for example, an N+ monocrystalline silicon substrate wafer, a region of N-type conductivity is epitaxially grown on it. Subsequently, a layer of insulating material, such as a layer of silicon dioxide, is grown on the N-type region as in drawing A.

Photolithographic masking and etching techniques are utilized to form a network of channels in the semiconductor wafer. By diffusion techniques, N+ impurity regions are formed in the wall of the channels near the surface of the wafer. These techniques serve to bring the N+ region up to the surface of the silicon dioxide masking layer as in B.

Silicon dioxide is now grown over the channeled surface of the wafer. A first polycrystalline silicon layer is grown on the silicon dioxide layer as in drawing C.

The original N/+/ substrate is etched away to the level of the silicon dioxide layer forming the bottom of each channel as in D.

A level layer of silicon dioxide is grown interconnecting the remaining portions of silicon dioxide to thus provide each N/+/, N semiconductor region with complete electrical isolation. A second substrate layer of polycrystalline silicon is grown on the SiO(2) layer to form the arrangement shown in E.

The first polycrystalline silicon layer is now removed until the silicon dioxide layer beneath i...