Browse Prior Art Database

Addressing for Expandable Modular Storage

IP.com Disclosure Number: IPCOM000095286D
Original Publication Date: 1965-Nov-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 47K

Publishing Venue

IBM

Related People

Carnevale, RJ: AUTHOR

Abstract

This addressing arrangement permits storage capacity to be expanded on a modular basis. Such is effected without increasing selection time or requiring additional power.

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Addressing for Expandable Modular Storage

This addressing arrangement permits storage capacity to be expanded on a modular basis. Such is effected without increasing selection time or requiring additional power.

Address bus 1 feeds a single memory address register MAR. The outputs of MAR are treated as transmission lines 2. Each has separate taps 3 leading to a respective set of line sense amplifiers 4 for each module 5 of storage. To prevent reflection of drive signals, each line 2 is terminated in its own characteristic impedance at last storage module 5'. Amplifiers 4 have high impedance to assure prompt transmission of the drive signal along the entire line and thus minimize selection time.

Thus, it is unnecessary to use a separate MAR for each storage module and to increase the power for driving the MAR's as more modules are added.

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