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Asynchronous Delay Circuit

IP.com Disclosure Number: IPCOM000095333D
Original Publication Date: 1965-Nov-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 35K

Publishing Venue

IBM

Related People

Breitenbach, EJ: AUTHOR [+2]

Abstract

This circuit is for increasing the rate at which information can be displayed on a cathode ray tube or similar display device. In the usual display devices, deflections are performed synchronously, i. e., at a fixed clock rate. This type of control is inefficient since the total time of all deflections is a small fraction of the total time allotted for deflections. The circuit overcomes such inefficiency by using an asynchronous mode of operation. This mode provides a much faster deflection rate. This is because a new deflection can begin immediately upon the completion of the current deflection. Thus, each deflection utilizes only so much time as is necessary to complete the deflection and the next deflection can be started immediately.

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Asynchronous Delay Circuit

This circuit is for increasing the rate at which information can be displayed on a cathode ray tube or similar display device. In the usual display devices, deflections are performed synchronously, i. e., at a fixed clock rate. This type of control is inefficient since the total time of all deflections is a small fraction of the total time allotted for deflections. The circuit overcomes such inefficiency by using an asynchronous mode of operation. This mode provides a much faster deflection rate. This is because a new deflection can begin immediately upon the completion of the current deflection. Thus, each deflection utilizes only so much time as is necessary to complete the deflection and the next deflection can be started immediately.

Transistor Q1 is an emitter-follower and is utilized primarily for impedance matching. The base of Q1 is connected by diodes to the deflection coils and senses the most negative potential which is an indicia of the maximum deflection. The output of Q1 is applied to transistor Q2 which functions as a level detector and switch. During the interval that the voltage applied to control Q2 is below the specified threshold value. Q2 conducts to charge capacitor C1 with a time constant R6C1. When Q2 turns off, C1 discharges with a time constant (R5 + R9) C1. The total charge and discharge time is adjusted via R9 to equal the required deflection time.

The third transistor stage Q3 acts as a switch and samples th...