Browse Prior Art Database

Semiconductor Chip Tester and Sorter

IP.com Disclosure Number: IPCOM000095522D
Original Publication Date: 1964-Feb-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 70K

Publishing Venue

IBM

Related People

Druschel, WO: AUTHOR

Abstract

This device tests semiconductor chips, registering the results of the tests on punched cards. Subsequently, the cards are used to sort the chips in accordance with the results of the individual tests.

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Semiconductor Chip Tester and Sorter

This device tests semiconductor chips, registering the results of the tests on punched cards. Subsequently, the cards are used to sort the chips in accordance with the results of the individual tests.

Affixed to glass disk 10, by glue or otherwise, is a semiconductor wafer 12 which has been diced into a multiplicity of chips 14. Disk 10 and a multiple punched card supporting frame 18 are mounted on table 16. Table 16 is movable both laterally and longitudinally so that any specific chip 14 can be brought directly beneath test probe 20 for test purposes. As each chip is individually positioned beneath probe 20, card holder 18 and the cards 22, 24 and 26 it holds are also respectively moved beneath punch heads 28, 30 and 32.

As a chip 14 is tested to measure its characteristics, one of cards 22, 24 or 26 is punched at a location which corresponds to the location of the particular chip under test. For instance, if the chip under test passes all tests, card 22 is punched at the position corresponding to the tested chip. Cards 24 and 26 are not punched. If on the other hand, the chip under test passes some measurements but is marginal on others, card 24 can be the one punched. Finally, if the chip fails the test altogether, card 26 is punched.

At the end of the testing operation, disk 10 is removed from table 16 and chips 14 are transferred to chip holder 40 in locations corresponding to the ones they occupied on disk 10. This oper...