Browse Prior Art Database

Digital Computing System

IP.com Disclosure Number: IPCOM000095577D
Original Publication Date: 1964-Mar-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 35K

Publishing Venue

IBM

Related People

Ward, JE: AUTHOR

Abstract

A digital computing system is utilized for performing arithmetic operations by utilizing fixed length, untapped delay lines and variable energizing pulse start-times.

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Digital Computing System

A digital computing system is utilized for performing arithmetic operations by utilizing fixed length, untapped delay lines and variable energizing pulse start- times.

Input device 12 reads the left-hand cards 10 and applies corresponding pulse patterns to read code converter 16. Converter 16 develops a special binary- decimal code for one operand and a pulse position representation for the other operand. The pulse position code provides data pulses at varying incremental points in time corresponding to a fixed decimal data cycle. An augend-minuend pulse is recirculated through the fixed length delay line. Such occurs until it is transferred to the addend-subtrahend section of device 16, that is, delay chain 16'. In delay chain 16', the decimal digit representing the addend is converted to the equivalent representation in a 1, 2, 3, 3' code and set up in a delay line chain having untapped delay lines corresponding to these code weights.

Converter 16 operates under control of circuits 18. These are synchronized with the cycle operation of the card transport mechanism 13 by a mechanical coupling. The binary-decimal data from converter 16 is applied, in parallel signal channels, to a static register 20. The decimal pulse position data pulses are coupled in separate channels to a twenty position dynamic accumulator 21. Additive and subtractive processes are effected by shifting the pulses in time relative to the reference clock pulses. Multip...