Browse Prior Art Database

Microelectronic Packaging Technique

IP.com Disclosure Number: IPCOM000095592D
Original Publication Date: 1964-Mar-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 52K

Publishing Venue

IBM

Related People

Chapman, RM: AUTHOR [+2]

Abstract

This packaging technique for microelectronic devices permits a combination of different hybrid integrated circuits to be realized as a single integrated component.

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Microelectronic Packaging Technique

This packaging technique for microelectronic devices permits a combination of different hybrid integrated circuits to be realized as a single integrated component.

Each microelectronic circuit 10 has attached to it discrete passive components 12, e. g., resistors, and active components 14, e. g., transistors. A plurality of circuits 10 forms a unique functional unit and is assembled together as a single integrated component. Each microelectronic circuit is adapted to perform a particular logical operation such as And, Or, Invert and the like. The combination of microelectronic circuits can be arranged as a single component to perform the function of a register, counter, adder or the like.

Each microelectronic circuit has terminal pins 16 which are staked in substrate 18. Pins 16 have flattened head members 20 on the upper surface of substrate 18. Head members 20 are connected to the discrete components through conductive leads 22. These are printed on the surface of the substrates. Pins 16, head members 20 and conductors 22 are solder-coated to reduce series resistance as well as to provide the metal for making solder reflow connections to the passive and active elements. An integrated component is formed by stacking the individual modules on top of one another.

Pins 16 of one module engage head members 20 of a lower module. The modules can be placed in a fixture which mechanically grips the stack to prevent slippage while esta...