Browse Prior Art Database

SCT Binary Trigger

IP.com Disclosure Number: IPCOM000095718D
Original Publication Date: 1964-May-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 34K

Publishing Venue

IBM

Related People

Mackay, JB: AUTHOR

Abstract

This binary trigger circuit uses the characteristics of surface potential control transistors (SCT) to steer positive input pulses.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 100% of the total text.

Page 1 of 2

SCT Binary Trigger

This binary trigger circuit uses the characteristics of surface potential control transistors (SCT) to steer positive input pulses.

A trigger pulse is applied via differentiating network R1C1 to grids G1 and G2 of SCT's 1 and 2. With SCT1 conducting and SCT2 nonconducting, the.differentiated positive input pulse in combination with the relatively high collector potential of SCT2 raises grid G1 sufficiently positive to turn SCT1 off. SCT2 is turned on by coupling the rising collector voltage of SCT1 to the base of SCT2 via overdrive capacitor C2.

The R1C1 differentiating circuit time constant is sufficiently short so that the positive going differentiated input is no longer present when the collector of SCT1 begins to rise. To further assure that both the high collector potential and the positive input do not appear simultaneously at G2, and thus tend to keep SCT2 turned off, delay network D2 is also provided. Network D2 and similar network D1, can be, e. g., inductors.

With SCT1 off, grid G2 is biased to +6 volts through R2, R3, and delay D2 so that SCT2 is conditioned for the next positive input pulse. The next succeeding positive pulse turns SCT2 off via its grid G2 and SCT1 is turned on in a manner similar to that described.

1

Page 2 of 2

2

[This page contains 2 pictures or other non-text objects]