Browse Prior Art Database

An And Gate Using Single FET

IP.com Disclosure Number: IPCOM000095725D
Original Publication Date: 1964-Jun-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 23K

Publishing Venue

IBM

Related People

Brennemann, A: AUTHOR [+2]

Abstract

A field effect transistor device 1 adapted as an And is shown in A. Device 1 includes body portion 3 of first conductivity type having diffused regions 5 and 7 of opposite conductivity type defining source and drain electrodes, respectively. In addition, two or more gate electrodes 9 and 11 insulated from body portion 3 modulate conduction along the opposing portions of channel 13 defined at the top surface of body portion 3. Conduction along that portion of channel 13 between gate electrodes 1 and 7 is modulated by fields generated by both gate electrodes 9 and 11. Gate electrodes 9 and 11 can be circular or rectangular depending upon the geometry of device 1.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 100% of the total text.

Page 1 of 2

An And Gate Using Single FET

A field effect transistor device 1 adapted as an And is shown in A. Device 1 includes body portion 3 of first conductivity type having diffused regions 5 and 7 of opposite conductivity type defining source and drain electrodes, respectively. In addition, two or more gate electrodes 9 and 11 insulated from body portion 3 modulate conduction along the opposing portions of channel 13 defined at the top surface of body portion 3. Conduction along that portion of channel 13 between gate electrodes 1 and 7 is modulated by fields generated by both gate electrodes 9 and 11. Gate electrodes 9 and 11 can be circular or rectangular depending upon the geometry of device 1.

An alternative arrangement is shown in B in which a third electrode 15 of opposite conductivity type is diffused between gate electrodes 9 and 11. Electrode 15 serves to lower the resistance of channel 13 and, also, to improve the turn-on characteristics of device 1. Third electrode 15 can or can not be connected to external circuitry. Also, gates 9 and 11 can be individually biased or multiplied for particular applications, e.g., signal modulation, amplification, inversion, etc.

1

Page 2 of 2

2

[This page contains 1 picture or other non-text object]