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Field Effect Transistor Shift Register

IP.com Disclosure Number: IPCOM000095782D
Original Publication Date: 1964-Jun-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 28K

Publishing Venue

IBM

Related People

Karlsbakk, O: AUTHOR

Abstract

This shift register uses the bilateral conduction characteristics of field effect transistors to control stage-to-stage transfer of information.

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Field Effect Transistor Shift Register

This shift register uses the bilateral conduction characteristics of field effect transistors to control stage-to-stage transfer of information.

Bistable circuits 10 and 12 are coupled to one another via shift control circuit
16. Circuit 16 includes a field effect transistor (FET) 20 and a temporary input storage capacitor 22. Resistor 24 couples the voltage appearing at the source of FET 26 to the drain of FET 20 and capacitor 22. Conductor 28 couples the gate of FET 30 to the source of FET 20. When a shift pulse is applied via shift line 32 to the gate of FET 20, circuit 16 transfers the state of circuit 10 to circuit 12.

If the voltages appearing at the source and drain of FET 20 are identical, indicating that circuits 10 and 12 reflect the same data, the application of a pulse to line 32 has no effect. If FET's 26 and 34 are respectively conductive and nonconductive, the drain voltage of FET 20 is low and its source voltage is high. The application of a shift pulse via line 32 causes a negative spike to be coupled via conductor 28 to the gate of FET 30 rendering it nonconductive.

FET 34 then becomes conductive through the multivibrator action of circuit 12 thus completing the information transfer. The exact opposite occurs if FET's 26 and 34 are respectively nonconductive and conductive. The time constant of capacitor 22 and resistor 24 is made longer than the duration of a shift pulse to prevent backward shifts of data...