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Circuit for Measuring the Turnon and Turnoff Delays of a Test Unit

IP.com Disclosure Number: IPCOM000095795D
Original Publication Date: 1964-Jul-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 36K

Publishing Venue

IBM

Related People

Woelkers, RC: AUTHOR

Abstract

This circuit employs a delay line in a feedback path with a test device or circuit for measuring the sum of the average turnon and turnoff delays of the device or circuit.

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Circuit for Measuring the Turnon and Turnoff Delays of a Test Unit

This circuit employs a delay line in a feedback path with a test device or circuit for measuring the sum of the average turnon and turnoff delays of the device or circuit.

A unit under test which provides a 180 degrees phase inversion is connected in a feedback path with delay line D1. This circuit comprising the unit and D1 oscillates at a frequency determined by the delay of D1 and the average propagation delay of the unit. The output pulse Eout appearing at 1 includes the turnon delay. The next succeeding output pulse Eout is delayed in its turnon by the turnoff delay of the unit.

A second delay line D2 is connected to receive an input Ein. Line D2 is chosen to have delay characteristics substantially identical to those of D1. When a pulse is provided at Ein, it appears at 2 in a form identical to that appearing at the input except that it is delayed by a time equal to the delay of D2. If the Exclusive Or function is taken of the signals Eout and the delayed Ein signal, the result is a pulse having a width which is equal to the sum of the turnon delay plus the turnoff delay of the unit under test. The pulse is also independent of the delays of D1 and D2.

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