Browse Prior Art Database

Input Output Priority Job and Channel Controls

IP.com Disclosure Number: IPCOM000095854D
Original Publication Date: 1964-Aug-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 3 page(s) / 61K

Publishing Venue

IBM

Related People

Waszak, ML: AUTHOR [+2]

Abstract

Priority may be controlled on the basis both of the type of operation to be performed and the particular device, or channel communicating with a particular device, in connection with which the operation is to be performed. In the lower drawing, a computer may contain a main priority circuit 10 which will determine what operation is to be per performed at any given instant. One way to achieve this is to have jobs of various priority calibers selected by individual priority circuits 12, 14 and 16 and circuit 10 selecting from them at any given moment. This, therefore, represents a sort of two-stage priority determining system in which priority of jobs is determined within each main priority classification, and the circuit 10 selecting the highest of the priority groups which is presented at a given moment.

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Input Output Priority Job and Channel Controls

Priority may be controlled on the basis both of the type of operation to be performed and the particular device, or channel communicating with a particular device, in connection with which the operation is to be performed. In the lower drawing, a computer may contain a main priority circuit 10 which will determine what operation is to be per performed at any given instant. One way to achieve this is to have jobs of various priority calibers selected by individual priority circuits 12, 14 and 16 and circuit 10 selecting from them at any given moment. This, therefore, represents a sort of two-stage priority determining system in which priority of jobs is determined within each main priority classification, and the circuit 10 selecting the highest of the priority groups which is presented at a given moment.

Within such a framework, a priority circuit which is sensitive both to the type of job requested, and the origination of the request may fit. Such a circuit is shown in the upper drawing. Each of channels 0... N is capable of requesting any one of a plurality of jobs which are oriented in a priority sequence A... X. The combination job and channel priority is achieved by having one circuit 16 for monitoring the jobs requested, and for developing a coded manifestation of the job which has the highest priority.

Once this manifestation is developed, it is utilized in another circuit 18 to recognize which channels have requested that job, and further, to determine which of the channels has the highest priority.

Thus, both the job and the channel with the highest resulting priority may be determined by these two circuits. The codes developed by the job code circuit and the channel code circuit are stored in respective registers 20 and 22 and are utilized to control the operation of the computer should this level of job priority achieve control thereover as determined by the circuit 10.

The contents of the code registers are gated at the appropriate time by a signal indicating that main computer priority has been assigned to this particular priority level (I/O jobs). The manifestations of the job and the channel which have the highest priority of all I/O channels and job requests are utilized in 24 to generate the next job step together with other information which may be fed into the circuit. However, prior to gating of these registers, signals representing the particular job which has the highest priority are f...