Dismiss
InnovationQ will be updated on Sunday, Oct. 22, from 10am ET - noon. You may experience brief service interruptions during that time.
Browse Prior Art Database

Shared Memory Addressing System

IP.com Disclosure Number: IPCOM000095934D
Original Publication Date: 1964-Oct-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 38K

Publishing Venue

IBM

Related People

Thomas, J: AUTHOR

Abstract

Each computer in a shared memory addressing system can address its own memory directly, and can also address each memory in the system, including its own, via a memory selector unit.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 75% of the total text.

Page 1 of 2

Shared Memory Addressing System

Each computer in a shared memory addressing system can address its own memory directly, and can also address each memory in the system, including its own, via a memory selector unit.

In standard mode, each computer operates independently, addressing its own memory in the same fashion it would address that memory if the computer were standing alone. For the computer to address a memory of 32, 768 words, standard mode addresses 00, 000 to 77,777 (octal) are required. Two high-order 0's identify standard mode.

In shared mode, each computer addresses each memory in the system, including its own memory, through a memory selector unit. The address includes two additional high-order octal digits to differentiate between memory units.

In the system shown, there are three computers A, B and C. Each has its own 32K memory A, B and C, respectively, and addresses it directly in standard mode with addresses 00,000 to 77,777. Each computer also is connected to a memory selector unit. The system can also contain a bulk memory, which is accessible only via the memory selector unit. For access in shared mode to any memory, a computer supplies an address to the memory selector unit, which from the high-order digits of the address selects a memory and from the low- order digits of the address selects the proper word from such selected memory.

In the system shown, the bulk memory is allotted shared mode addresses 0,100,000 to 1,077,077. Computer A is...