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Word Driver Circuit

IP.com Disclosure Number: IPCOM000096066D
Original Publication Date: 1964-Nov-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 27K

Publishing Venue

IBM

Related People

Wu, W: AUTHOR

Abstract

A high-speed, high-power word driver circuit comprises tunnel diode 1 and NPN transistors T1, T2 and T3. Tunnel diode 1 is operated in monostable fashion to improve switching time, and, also, to control the duration of the output pulse directed to load R, e. g., a balun connected to a word drive line.

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Word Driver Circuit

A high-speed, high-power word driver circuit comprises tunnel diode 1 and NPN transistors T1, T2 and T3. Tunnel diode 1 is operated in monostable fashion to improve switching time, and, also, to control the duration of the output pulse directed to load R, e. g., a balun connected to a word drive line.

During quiescent operation, transistor T1 is saturated and transistors T2 and T3 are cutoff. A negative pulse applied to input terminal A triggers diode 1 from the low voltage state to the high voltage state and produces a negative pulse at point B. Transistor T1 is driven from saturation to cutoff and, in turn, drives transistors T2 and T3 into saturation so that load R is energized by a negative pulse. Since transistors T1, T2 and T3 are operated either in cutoff or in saturation, total power dissipation in the word driver circuit is minimized.

Current feedback resistors R1 and R2 are used to counteract the effect of temperature and unit-to-unit variation of transistors T1 and T2. Bypass capacitors C1 and C2 are used to prevent resistors R3 and R5 from providing AC feedback and, also, to improve switching time of the word driver circuit. Time constants R1C1 and R2C2 are smaller than the minimum cycle time to maintain DC output level constant without shifting when repetition rate changes. Thus, voltage levels at the emitters of transistors T1 and T2 recover within the minimum cycle time.

Output pulses supplied to load R can be adjusted by stretc...