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Accumulator for an Adaptive System

IP.com Disclosure Number: IPCOM000096082D
Original Publication Date: 1964-Dec-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 26K

Publishing Venue

IBM

Related People

Akmenkalns, IG: AUTHOR [+2]

Abstract

This arrangement is an accumulator used with an adaptive logic system. In this, bits stored in a serial storage device, such as a delay line, magnetic drum, or other like device, are accorded different weights depending upon their presence at predetermined positions in a pulse train.

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Accumulator for an Adaptive System

This arrangement is an accumulator used with an adaptive logic system. In this, bits stored in a serial storage device, such as a delay line, magnetic drum, or other like device, are accorded different weights depending upon their presence at predetermined positions in a pulse train.

As the bit sequence is read out from storage device 5 under control of timing circuits 13, the presence or absence of bits at particular locations in the pulse train causes selected single shots in binary to pulse width converter 7 to provide outputs of constant amplitude. These outputs have a pulse width or duration proportional to the values of the particular bits which they represent. These coded-width pulses are supplied in common to the input of integrator 9. The output of integrator 9 is proportional to the value of the widths of all the pulses read out at a particular time, and, hence, proportional to the sum of the weights of the bits read serially from storage device 5.

If the output from integrator 9 is sufficiently great, threshold detector 11 supplies an output indicative of that fact.

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