Browse Prior Art Database

Redundancy Remainder Generation

IP.com Disclosure Number: IPCOM000096097D
Original Publication Date: 1964-Dec-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 49K

Publishing Venue

IBM

Related People

D'Antonio, R: AUTHOR [+7]

Abstract

Data transmission systems of the general kind described in the text "Error Correcting Codes", by W. W. Peterson, can employ a polynomial P to generate a remainder R, in such manner that later originating errors in the message can be detected and corrected. The selection of P is based on several factors. One is the number of data bits per unit message. Another is the cyclic factor of the specific polynomial. For long message units, a long P and R can be utilized. Specialized switching equipment is advantageous for avoiding the need for unduly long data registers.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 53% of the total text.

Page 1 of 2

Redundancy Remainder Generation

Data transmission systems of the general kind described in the text "Error Correcting Codes", by W. W. Peterson, can employ a polynomial P to generate a remainder R, in such manner that later originating errors in the message can be detected and corrected. The selection of P is based on several factors. One is the number of data bits per unit message. Another is the cyclic factor of the specific polynomial. For long message units, a long P and R can be utilized. Specialized switching equipment is advantageous for avoiding the need for unduly long data registers.

P, which in the illustrated case is 120 bits long, is stored in the form of ten twelve-bit bytes in a memory 50. R, which is stored in the form of ten twelve-bit bytes in memory 52, is operated upon by P in a manner determined by the incoming message on line 54. The rule for this operation may be: (1) Shift R up one bit order, and then (2) whenever the former high-order bit 56 of the high- order byte of R is different from the incoming bit on line 54, then P will be added in modulo-2 fashion, i. e. , Exclusive Or'd, with the shifted R. The resulting modified R is then re-stored in memory 52. If the content of bit position 56 is not different from the bit on line 54, P is not applied to R. In either case the R shift operation is carried out, with the overflow, i. e. , the bit formerly in position 56, being utilized in a so-called look-ahead function for operation on the next...