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Noise Reject Communication Line Interface

IP.com Disclosure Number: IPCOM000096155D
Original Publication Date: 1963-Jan-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 3 page(s) / 46K

Publishing Venue

IBM

Related People

Lettieri, J: AUTHOR

Abstract

This noise-reject circuit produces an output signal provided a change in state of input data is sustained for a preselected period. The period is established by a single-shot which has a high duration to recovery.

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Noise Reject Communication Line Interface

This noise-reject circuit produces an output signal provided a change in state of input data is sustained for a preselected period. The period is established by a single-shot which has a high duration to recovery.

The circuitry comprises a plurality of conventional Invert (I), And-Invert (AI), Or -Invert (OI) circuits and a trigger. Operation of the circuit is described in terms of down and up signal levels which correspond to minus and plus voltage levels, respectively, with respect to a reference level. Particular circuit locations are identified with an encircled letter and the voltages at the locations are indicated below in the respective graphs.

Normally, an input level to the noise-reject circuit at A is down and the circuit output level at F is also down. I 1, responsive to the input signal level, provides an up signal to an OI 2. Latch circuit 11 provides as a second input a complement output or up signal to OI 2 with the result that a down output signal is supplied to AI 4. OI 3, responsive to the input signal, also receives as a second input a true output or down signal from latch 11. OI 3 provides an up signal to AI 4. The unlike inputs to AI 4 provide an up signal to single-shot trigger
5.

Trigger 5 responds to negative input signals of preselected duration to provide a positive output signal. A positive input signal terminates the single-shot timing. The trigger output level at point C is normally negative except for negative input signals of preselected duration when a positive spike is produced by the trigger. Signals less than the preselected duration do not affect the normally negative output level.

The negative or down trigger output is supplied as first inputs to positive AI's 7 and 8. AI 7 receives as a second input the down input signal. AI 8 receives as a second input the up signal from I 1. Both inputs to AI's 7 and 8 must be positive to obtain a negative output signal at D and E. AI's 7 and 8, as a result, provide up or positive signals to latch 1 1. The true and complement outputs from latch I 1, as a result, are down and up, respectively.

When an input signal 20 appears, I 1 is altered to provide a...