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Browse Prior Art Database

Analog To Digital Converter

IP.com Disclosure Number: IPCOM000096164D
Original Publication Date: 1963-Jan-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 38K

Publishing Venue

IBM

Related People

Propster, CH: AUTHOR

Abstract

In this analog to digital converter, an integrating amplifier is connected to a reference voltage for a length of time determined by the carry signal from a counter. At the time T1, the integrating amplifier is disconnected from the reference and connected to the unknown voltage having the opposite polarity. The counter is run until the charge on the integrating capacitor reaches the initial or ground level. The counter is stopped at this point T2, with the value in the counter representing the ratio of the known to unknown voltage.

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Analog To Digital Converter

In this analog to digital converter, an integrating amplifier is connected to a reference voltage for a length of time determined by the carry signal from a counter. At the time T1, the integrating amplifier is disconnected from the reference and connected to the unknown voltage having the opposite polarity. The counter is run until the charge on the integrating capacitor reaches the initial or ground level. The counter is stopped at this point T2, with the value in the counter representing the ratio of the known to unknown voltage.

A conversion cycle begins with the counter 1 at zero and gate 2 opened when a signal from comparator 3 indicates a predetermined reference at the output of integrating amplifier 4. In response to a signal from comparator 3, control unit 5 allows pulses from oscillator 6 to pass to counter 1. During the time when pulses are being accumulated in counter 1, a charge proportional to the reference voltage applied at terminals 7 accumulates on capacitor 8 resulting in the voltage EC as shown in the drawing.

When counter 1 reaches a predetermined value, it develops a carry signal on line 9 and resets to zero. This carry signal operates through control 5 to close gate 2 and open gate 10. Since the unknown voltage applied to terminals 11 is opposite in polarity to the reference voltage at terminals 7, amplifier 4 now integrates downwardly as shown. At the same time gate 10 is opened, oscillator pulses are applied th...