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Browse Prior Art Database

Feedback Trigger for Delay Line

IP.com Disclosure Number: IPCOM000096270D
Original Publication Date: 1963-Mar-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 28K

Publishing Venue

IBM

Related People

Kennedy, JJ: AUTHOR

Abstract

The circuit operates a delay line in a non-return-to-zero mode. A input pulse is coupled to terminal A of drive circuit 11 and thence through an input transducer coil 8 to a delay line 12. The delayed pulse is coupled through output transducer coil 10 to be sensed by bipolar sense amplifier 13. The signal outputs at terminal B and C of amplifier 13 are respectively coupled through diodes 14, 15 and 16, 17 to detector 18. The detector 18 signal output D is connected to two sides of binary counter trigger 19. This has outputs E and F which are coupled as feedback signals through diodes 20 and 21 to the junction of diodes 14, 15 and 16, 17, respectively.

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Feedback Trigger for Delay Line

The circuit operates a delay line in a non-return-to-zero mode. A input pulse is coupled to terminal A of drive circuit 11 and thence through an input transducer coil 8 to a delay line 12. The delayed pulse is coupled through output transducer coil 10 to be sensed by bipolar sense amplifier 13. The signal outputs at terminal B and C of amplifier 13 are respectively coupled through diodes 14, 15 and 16, 17 to detector 18. The detector 18 signal output D is connected to two sides of binary counter trigger 19. This has outputs E and F which are coupled as feedback signals through diodes 20 and 21 to the junction of diodes 14, 15 and 16, 17, respectively.

The feedback signal from trigger 19 clamps out undesired signal variations, as for example, the second of two contiguous pulses which. are the same polarity. This permits only the desired signal variations in the non-return-to-zero mode of operation to activate binary counter trigger 19.

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