Browse Prior Art Database

Matrix Store with Short Reset Time

IP.com Disclosure Number: IPCOM000096296D
Original Publication Date: 1963-Mar-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 63K

Publishing Venue

IBM

Related People

Christopherson, WA: AUTHOR

Abstract

The two sets of drive lines in a core switch driven matrix store are connected by read terminal resistors 33 and 45 to ground and by write terminal resistors 49 and 50 to a common junction 60. Transistor switch 61 is connected between the common junction 60 and ground.

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Matrix Store with Short Reset Time

The two sets of drive lines in a core switch driven matrix store are connected by read terminal resistors 33 and 45 to ground and by write terminal resistors 49 and 50 to a common junction 60. Transistor switch 61 is connected between the common junction 60 and ground.

Control 56 is connected to base 48 of transistor 61. The latter is normally biased to permit current to flow from the common junction 60 to ground. However, at the end of a write cycle, the bias applied by control 56 to base 48 is changed so that transistor 61 stops conducting. This causes the terminal resistance of the drive lines to become infinite, leading to a rapid decay in the secondary current flowing in the core switches supplying the write signals to the matrix store.

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