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Digital Data Detection Circuitry

IP.com Disclosure Number: IPCOM000096302D
Original Publication Date: 1963-Mar-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 36K

Publishing Venue

IBM

Related People

Applequist, JE: AUTHOR

Abstract

This is a circuit for reading magnetically recorded digital information, with a particular arrangement for reducing the noise in the readback signal. The circuit reads out data recorded with a system, where a binary 1 is recorded by reversing the direction of magnetization of a recording surface, while a binary 0 is recorded by not reversing the direction of magnetization.

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Digital Data Detection Circuitry

This is a circuit for reading magnetically recorded digital information, with a particular arrangement for reducing the noise in the readback signal. The circuit reads out data recorded with a system, where a binary 1 is recorded by reversing the direction of magnetization of a recording surface, while a binary 0 is recorded by not reversing the direction of magnetization.

When data is read, a voltage pulse is generated at the output terminals of a reading head. This occurs each time the head passes over a 1 bit. No pulse is generated by passage over a 0 bit. Each single pulse of the readback signal, when differentiated, produces a full cycle pulse.

Read signal from head 1 is supplied through differential amplifier DA 2 to differentiator D3 and then to differential amplifier DA4, having two complementary outputs. The phase 1 signal is supplied through amplifier A5 to amplifier and inverter 1A6 and also to single-shot multivibrator MV 7. The phase 2 signal is similarly supplied through amplifier A8 to amplifier and inverter 1A9 and a single shot multivibrator MV 10. Signals from A5 and A8 have slightly positive average values. MV7 and MV10 generate gate signals each time the differentiated signal supplied to them passes through zero. These gate signals, having negative average values, are then gated with the squared, differentiated signals from networks 1A6 and 1A9, respectively, in Nand's 11 and 12, to produce an output pulse from one of And's 11 and...